The present application relates to a junction type power FET (or semiconductor device) and a method of manufacturing the same, for example, those applicable to a junction type SiC power FET.
Japanese Unexamined Patent Application Publication (Translation of PCT application) No. 2002-520816 (Patent Document 1) or U.S. Pat. No. 6,847,091 (Patent Document 2) corresponding thereto mainly relates to a planar type vertical power MOSFET. They show, with regard to a planar type vertical power MOSFET, a device structure having, in a drift region, floating regions of a conductivity type opposite to that of the drift region in a dispersed form. According to these documents, this power MOSFET is applicable to a junction FET or the like.
Japanese Patent Application Laid-Open No. 2003-31591 (Patent Document 3) or U.S. Patent Application Publication No. 2002-167011 (Patent Document 4) corresponding thereto relates to a vertical non-planar type junction FET. These documents disclose a vertical type junction FET having a lateral channel and having, in a drift region, a source potential region having a conductivity type opposite to that of the drift region.    WO 2000/014809 (Patent Document 5) or U.S. Patent Application Publication No. 2005-6649 (Patent Document 6) corresponding thereto relates to a vertical planar type junction FET. These documents disclose a vertical planar type junction FET having a floating P type region below a lateral channel thereof.    [Patent Document 1] Japanese Unexamined Patent Application Publication (Translation of PCT application) No. 2002-520816    [Patent Document 2] U.S. Pat. No. 6,847,091    [Patent Document 3] Japanese Patent Application Laid-Open No. 2003-31591    [Patent Document 4] U.S. Patent Application Publication No. 2002-167011    [Patent Document 5] WO 2000/014809    [Patent Document 6] U.S. Patent Application Publication No. 2005-6649